Date: 2026-03-19
If you're designing boards for today's electronics, you've probably noticed things are getting faster. Not just a little faster—a lot faster. We're talking PCIe Gen 5 and 6, DDR5 memory, 112G PAM4, and signals that treat a few millimeters of copper as a major obstacle.
Here's the reality: high speed PCB design isn't the same as the boards you routed five years ago. At these speeds, the PCB itself becomes part of the circuit. Traces act like transmission lines. Vias create reflections. Materials that worked fine before suddenly introduce signal loss and skew.
I've watched engineers struggle with boards that looked perfect in the layout but failed in testing—all because of subtle high-speed effects they didn't account for. Let's break down what actually matters when you're designing for speed, and how to avoid the common pitfalls.
First, let's clear up a common misconception. High speed isn't about clock frequency—it's about edge rate. A signal with a fast rise time can cause problems even if the clock frequency is modest .
When the trace length becomes comparable to the signal's rise time, that trace stops acting like a simple wire and starts acting like a transmission line. Reflections happen. Impedance mismatches become critical. And if you're not careful, your carefully designed circuit stops working.
For practical purposes, if you're working with signals above 50 MHz or with fast rise times (under a nanosecond), you're in high-speed territory. That means paying attention to impedance, crosstalk, and signal integrity from the start.
Here's something many designers don't think about: the material itself can cause timing problems. Most rigid PCBs use woven glass fabric in the dielectric layers. The glass has a higher dielectric constant (around 6) than the surrounding resin (around 3-4) .
When a trace runs over a glass bundle versus an open resin area, it sees a different Dk, which means different propagation velocity. For a differential pair, if one trace happens to ride over glass while the other rides over resin, you get skew—signals arriving at different times .
At 10 Gbps and above, this matters. At 112 Gbps, it's critical. Measurements show that in standard glass laminates, the Dk difference between glass-knuckle and bundle-open regions can be as high as 0.4, creating picoseconds of skew that eat into your timing budget .
What to do about it:
Use spread glass fabrics (like 1078) which distribute the glass more evenly .
Consider ceramic-filled laminates that smooth out Dk transitions between glass and resin .
Some designers rotate the PCB relative to the glass weave by about 10-12 degrees, though this reduces panel utilization .
For critical differential pairs, route them close together so they experience the same local dielectric environment.
Standard FR-4 works fine for many applications, but as speeds climb, its limitations become painful. Dielectric loss increases with frequency. Dk varies with temperature and frequency. And the glass weave effect becomes harder to ignore.
For high-speed designs, you need to think about Df (dissipation factor) and Dk stability. Lower Df means less signal loss. Stable Dk means predictable impedance and propagation delay.
The industry has developed a hierarchy of high-speed materials, often referred to by their "M" grades :
M2/M4: Good for moderate speeds, reasonable cost, widely available
M6: The workhorse for AI servers and 112G designs—significantly lower loss than M4, but requires tighter process control
M8/M9: For the most demanding applications, with extremely low loss and tightly controlled Dk, but expensive and harder to work with
For AI servers and high-performance computing, materials like M6 have become essential. They use advanced resin systems (often hydrocarbon-based) and carefully matched glass fabrics to achieve the electrical performance required for multi-gigabit signaling .
Copper foil also matters. Standard electro-deposited copper has surface roughness that increases loss at high frequencies. Low-profile copper (HVLP, or very low profile) reduces this effect and is becoming standard for high-speed designs .
Your layer stackup determines what's possible. For high-speed designs, a few principles are non-negotiable:
High-speed signals need a continuous reference plane (preferably ground) adjacent to the signal layer . This provides a return path directly under the trace, minimizing loop area and controlling impedance.
Never route high-speed signals over splits in the reference plane. The return current can't jump the gap, so it takes a detour, creating a slot antenna that radiates EMI and destroys signal integrity .
Every high-speed trace needs a defined impedance—typically 50Ω single-ended, 90Ω or 100Ω differential . This is achieved by controlling trace width, copper thickness, and dielectric height.
Work with your fabricator early to determine the right stackup for your target impedance. Use field solvers to calculate required trace widths, and include test coupons on the panel to verify impedance after fabrication .
HDI stackups often use thin dielectrics (2-4 mils) between signal and reference planes. This improves impedance control, reduces crosstalk, and lowers plane impedance for better power integrity .
Placement determines how well your routing will work. A few guidelines:
Start with connectors and critical components. They're often fixed by the enclosure and set the stage for everything else .
Keep high-speed paths short. Every millimeter of trace adds delay, loss, and potential for interference .
Group by function. Keep analog and digital sections separate to prevent noise coupling .
Consider return paths. Place components so high-speed signals have clean, continuous reference planes .
Differential signaling relies on balance. The positive and negative traces must be tightly coupled and length-matched .
Keep traces close together to maintain differential impedance.
Match lengths within the pair to minimize skew. Use serpentine routing to extend the shorter trace, but keep meander spacing at least 3× trace width to prevent self-coupling .
Avoid changing layers unnecessarily. If you must, use symmetric via transitions so both legs see the same structure .
This is the most ignored rule in high-speed design. Every signal has a return current that flows directly underneath it on the reference plane .
If you route over a split plane, that return current has to find another path—around the split, through stitching capacitors, or worse. The result is increased inductance, EMI radiation, and signal degradation.
Never route high-speed traces over split reference planes.
When traces run parallel for long distances, they can couple energy into each other. The standard guideline is the 3W rule: keep center-to-center spacing at least 3× the trace width . For aggressive signals like clocks, increase to 4W or 5W.
Every via is a discontinuity. It adds inductance, capacitance, and potentially resonance. For high-speed signals:
Minimize vias wherever possible.
Use blind and buried vias to reduce stub length .
Back-drill through-hole vias to remove unused stubs .
When changing reference planes, add ground stitching vias nearby to maintain return path continuity .
A via stub is the unused portion of a through-hole via. At certain frequencies, that stub resonates, creating sharp notches in the frequency response that can completely block your signal .
For example, a 60-mil stub in FR-4 resonates around 12.3 GHz—right in the bandwidth of 10+ Gbps signals. The solution is either back-drilling (removing the stub) or using HDI with microvias that have no stub at all .
High-density interconnect isn't just about fitting more traces in less space. It also improves signal integrity .
Microvias eliminate stubs. Because they only connect adjacent layers, there's no unused barrel to create resonances .
Shorter vertical distances mean lower inductance and capacitance, reducing signal degradation .
Finer geometries let you route dense BGAs that would be impossible with conventional technology.
But HDI requires careful design. Via stacking must be symmetric for differential pairs. Reference plane transitions need ground stitching. And not every fabricator has the capability to produce complex HDI reliably .
No matter how careful your design, you need to verify it.
Impedance testing confirms your controlled impedance lines meet spec.
TDR (time domain reflectometry) reveals impedance discontinuities.
VNA measurements show insertion loss and return loss across frequency.
Eye diagram testing validates signal quality at the receiver.
For prototypes, flying probe testing with impedance capability is often sufficient. For production, you'll need test coupons on the panel that can be measured without destroying boards.
At Kaboer, we've been manufacturing high-speed PCBs since 2009. We're in Shenzhen, and we handle the full range—from standard high-speed designs to complex HDI boards, flexible circuits, and rigid-flex for the most demanding applications.
What we offer:
Material expertise. We work with all major high-speed laminates—M4, M6, Rogers, PTFE, and more. We understand how material selection affects performance and manufacturability .
HDI capability. Microvias down to 2 mil, sequential lamination, and advanced stackups for dense BGA escape .
Precision manufacturing. Tight impedance control, back-drilling, and rigorous testing.
Fast prototyping. Need to validate a high-speed design quickly? We offer quick-turn prototypes to catch issues early.
Engineering support. Our engineers review your stackup and design, flag potential issues, and suggest improvements before production.
We have our own PCBA factory, which means we don't just make the boards—we can assemble them too. That's one partner, one quality standard, from bare board to finished, tested module.
If you're ever in Shenzhen, you're welcome to visit our factory and see how we build high-speed boards.
Send us your Gerber files or requirements. We'll review your design, give you honest feedback, and get back to you with a quote. We've been at this for over 15 years, and we believe the best partnerships start with straightforward conversations.
Kaboer manufacturing PCBs since 2009. Professional technology and high-precision Printed Circuit Boards involved in Medical, IOT, UAV, Aviation, Automotive, Aerospace, Industrial Control, Artificial Intelligence, Consumer Electronics etc..
English
Wechat
+86 13670210335
+86 13670210335
E-mail